Title :
Fast self-recovering controllers
Author :
Hertwig, Andre ; Hellebrand, Sybille ; Wunderlich, Hans-Joachim
Author_Institution :
Comput. Archit. Lab., Stuttgart Univ., Germany
Abstract :
A fast fault-tolerant controller structure is presented which is capable of recovering from transient faults by performing a rollback operation in hardware. The proposed fault-tolerant controller structure utilizes the rollback hardware also for system mode and this way achieves performance improvements of more than 50% compared to controller structures made fault tolerant by conventional techniques, while the hardware overhead is often negligible. The proposed approach is compatible with state-of-the-art methods for FSM decomposition, state encoding and logic synthesis
Keywords :
built-in self test; computer architecture; control system CAD; controllers; fault tolerant computing; finite state machines; logic CAD; transients; FSM decomposition; checkpointing; fast self-recovering controllers; fault tolerance; fault-tolerant controller; logic synthesis; performance driven synthesis; rollback hardware; rollback operation; state encoding; transient faults; Added delay; Buffer storage; Circuits; Clocks; Control systems; Hardware; Logic; Pipelines; Registers; Timing;
Conference_Titel :
VLSI Test Symposium, 1998. Proceedings. 16th IEEE
Conference_Location :
Monterey, CA
Print_ISBN :
0-8186-8436-4
DOI :
10.1109/VTEST.1998.670883