DocumentCode :
2860070
Title :
A low-power bipolar serial pipeline multiplier chip
Author :
Kane, John
Author_Institution :
Bell Laboratories, Allentown, PA, USA
Volume :
XIX
fYear :
1976
fDate :
18-20 Feb. 1976
Firstpage :
16
Lastpage :
17
Abstract :
A monolithic 4-bit serial pipeline multiplier chip using nonepitaxial GIMIC-O bipolar technology, will be discussed. Design employs emitter function logic and current steering trees. External leads are ECL compatible.
Keywords :
Circuits; Digital filters; Flip-flops; Large scale integration; Lifting equipment; Logic; Microprocessors; Pipelines; Shift registers; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1976 IEEE International
Conference_Location :
Philadelphia, PA, USA
Type :
conf
DOI :
10.1109/ISSCC.1976.1155486
Filename :
1155486
Link To Document :
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