DocumentCode :
2860373
Title :
Modelling and architecture exploration of a medium voltage protection device
Author :
Rahmouni, K. ; Gerin, P. ; Chabanet, Sebastien ; Pianu, P. ; Petrot, Frédéric
Author_Institution :
Power Monitoring & Control, Schneider Electr. Ind., Eybens, France
fYear :
2009
fDate :
8-10 July 2009
Firstpage :
46
Lastpage :
49
Abstract :
In this paper we focus on the modelling and architecture exploration of Schneider Electric protection devices at the Cycle Accurate Bit Accurate (CABA) level. The goal is to find the best hardware/software partitioning and improve the tests coverage rate in order to increase the robustness and fault-tolerance of this class of safety devices. This approach is applied on a medium voltage protection relay called Sepam10. This example is considered to be typical for a wide class of devices, thus showing that the modelling approaches used in high complexity System On Chip (SoC) devices are also of great interest for power electronic control devices.
Keywords :
electronic engineering computing; hardware-software codesign; power engineering computing; power integrated circuits; power supplies to apparatus; power system protection; system-on-chip; cycle accurate bit accurate level; fault tolerance; hardware/software partitioning; medium voltage protection device; power electronic control device; system-on-chip devices; Computer architecture; Fault tolerance; Hardware; Medium voltage; Power system protection; Power system relaying; Robustness; Safety devices; Software safety; Software testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Industrial Embedded Systems, 2009. SIES '09. IEEE International Symposium on
Conference_Location :
Lausanne
Print_ISBN :
978-1-4244-4109-9
Electronic_ISBN :
978-1-4244-4110-5
Type :
conf
DOI :
10.1109/SIES.2009.5196191
Filename :
5196191
Link To Document :
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