• DocumentCode
    2860590
  • Title

    Substrate and load gate voltage compensation

  • Author

    Blaser, E. ; Chu, W. ; Sonoda, G.

  • Author_Institution
    IBM Corp., Hopewell Junction, NY, USA
  • Volume
    XIX
  • fYear
    1976
  • fDate
    18-20 Feb. 1976
  • Firstpage
    56
  • Lastpage
    57
  • Abstract
    A report on the application of on-chip substrate voltage and load-gate voltage compensation to minimize FET chip-to-chip power and performance variations.
  • Keywords
    Charge pumps; Circuit testing; Clocks; Delay effects; Detectors; Leakage current; Power dissipation; Switches; Threshold voltage; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference. Digest of Technical Papers. 1976 IEEE International
  • Conference_Location
    Philadelphia, PA, USA
  • Type

    conf

  • DOI
    10.1109/ISSCC.1976.1155514
  • Filename
    1155514
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2860590