Title :
A high-speed 16K-bit NMOS RAM
Author :
Itoh, Kenji ; Shimohigashi, K. ; Chiba, Kazuya ; Taniguchi, Kazuhiro ; Kawamoto, Yasutaka
Author_Institution :
Hitachi Ltd., Tokyo, Japan
Abstract :
A 16K-BIT NMOS dynamic memory array, designed lor high speed main frame memory applications, will be described. High speed has been achieved with a sense circuit for one tramistorcell, in combination with improved N-channel silicon-gate technology.
Keywords :
Circuit testing; Clocks; DC generators; MOS devices; Preamplifiers; Random access memory; Read-write memory; Signal generators; Timing; Voltage;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1976 IEEE International
Conference_Location :
Philadelphia, PA, USA
DOI :
10.1109/ISSCC.1976.1155530
