DocumentCode
2861465
Title
A 32K ROM using differential ramp techniques
Author
Greene, R.
Author_Institution
MOS Technology, Inc., Norristown, PA, USA
Volume
XIX
fYear
1976
fDate
18-20 Feb. 1976
Firstpage
186
Lastpage
187
Abstract
This paper will cover a 32K ROM using standard P-channel, low-voltage, high-yielding processing. It utilizes a differential ramp technique coupled with ground switching to achieve a relatively small chip size, low power consumption of 14 μW bit (450 mW) and operation from dc to 1.6 MHz.
Keywords
Decoding; Delay effects; Equivalent circuits; Logic; MOS capacitors; Read only memory; Threshold voltage; Voltage control;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1976 IEEE International
Conference_Location
Philadelphia, PA, USA
Type
conf
DOI
10.1109/ISSCC.1976.1155567
Filename
1155567
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