Title :
A 32K ROM using differential ramp techniques
Author_Institution :
MOS Technology, Inc., Norristown, PA, USA
Abstract :
This paper will cover a 32K ROM using standard P-channel, low-voltage, high-yielding processing. It utilizes a differential ramp technique coupled with ground switching to achieve a relatively small chip size, low power consumption of 14 μW bit (450 mW) and operation from dc to 1.6 MHz.
Keywords :
Decoding; Delay effects; Equivalent circuits; Logic; MOS capacitors; Read only memory; Threshold voltage; Voltage control;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1976 IEEE International
Conference_Location :
Philadelphia, PA, USA
DOI :
10.1109/ISSCC.1976.1155567
