Synthesisable VHDL for Technology-Independent ASIC description

A Teaching Company Scheme between the British Aerospace Defence Dynamics in Stevenage (BAe) and the University of Hertfordshire (UH) is investigating the application of Hardware Description Languages (HDLs), with the objectives of: (1) establishing whether HDLs offer a method of expressing complex electronic systems in a manner which is rigorous enough to facilitate circuit proving and to allow selective subcontracting at a number of design abstraction levels; and (2) transferring the new technology gained to product development teams at BAe. Four Teaching Company Associates (TCAs) are being employed on the programme, working alongside research staff at BAe, specialising in the following activity areas: HDL-based ASIC design, graphical entry and CASE methodologies for HDL-based hardware design, system-level HDL-based design, and front-to-back testing methodologies for HDL-based design. In keeping with British Aerospace´s policies, all the work in the scheme is based around a robust case-study image processor system, and is developing methodologies based around commercially available tools rather than in-house or public-domain research tools. VHDL has been chosen as the language on which to base the scheme because of the wide support it enjoys. The paper describes some of the results so far, including a technology-independent ASIC implementation of one of the components in the system and the implementation of part of the ASIC using a graphical entry tool