A Low Power Celp Decoder VLSI Architecture With Reduced Memory Requirement For Low Bit Rate Speech Codec

Author

An-Nan Suen ; Jhing-Fa Wang ; Jia-Lang Lin

Author_Institution

Institute of Information Engineering National Cheng Kung University, Tainan, Taiwan, R.O. C.

fYear

1997

fDate

11-13 June 1997

Firstpage

214

Lastpage

215

fLanguage

English

Publisher

ieee

Conference_Titel

Consumer Electronics, 1997. Digest of Technical Papers. ICCE., International Conference on

Conference_Location

Rosemont, IL, USA

Print_ISBN

0-7803-3734-4

Type

DOI

10.1109/ICCE.1997.625936

Filename

625936

Link To Document