DocumentCode
2862782
Title
Analysis of Safety Related Architectures
Author
Coccoli, Andrea ; Bondavalli, Andrea
Author_Institution
ISTI-CNR Pisa- Italy
fYear
2003
fDate
01-03 Oct. 2003
Firstpage
111
Lastpage
111
Abstract
Fault and Error latency have a great impact on the dependability properties of control systems for critical applications. The replication techniques that are used to build such systems and the degree of replication usually are tailored to the tolerance of one fault (at a time) and result inadequate to cope with latent errors that show up altogether. For this reason, internal error detection mechanisms are coupled with on-line testing activities (diagnostic tests) intended to stress each component of the system so to induce errors and thus to anticipate their detection (reducing latency). Different testing strategies can be adopted on the basis of the element to be tested, the fault to be ‘hunted’, the characteristics of the system it is applied to. In this work we start from this simple consideration and will elaborate on architectural organizations to ensure safe and available service.
Keywords
Circuit faults; Computer architecture; Random access memory; Safety; Testing; Transient analysis; Tunneling magnetoresistance;
fLanguage
English
Publisher
ieee
Conference_Titel
Object-Oriented Real-Time Dependable Systems, 2003. WORDS 2003 Fall. The Ninth IEEE International Workshop on
Print_ISBN
0-1795-2054-5
Type
conf
DOI
10.1109/WORDS.2003.1267497
Filename
1410952
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