DocumentCode
2863679
Title
Quarter-pel Interpolation Architecture in H.264/AVC Decoder
Author
Bae, Jongwoo ; Park, Neungsoo ; Lee, Seong-Won
fYear
2007
fDate
11-13 Oct. 2007
Firstpage
224
Lastpage
227
Abstract
In this paper, to reduce the computation amount of the quarter-pel interpolation in H.264 motion compensation, two-step interpolation approach is proposed: the first step is the half-pel interpolation and the other is the quarter-pel interpolation using the previous results. The quarter-pel interpolation is performed selectively according to the motion vector. The half-pel interpolation can be performed by simple row shift operation of the data stored in the register. Therefore, the proposed approach can be implemented as an simple hardware architecture which can perform a fast interpolation enough to process high-definition videos.
Keywords
Automatic voltage control; Computer architecture; Decoding; Hardware; IEC standards; Interpolation; Motion compensation; Pervasive computing; Registers; Video coding;
fLanguage
English
Publisher
ieee
Conference_Titel
Intelligent Pervasive Computing, 2007. IPC. The 2007 International Conference on
Conference_Location
Jeju City
Print_ISBN
978-0-7695-3006-2
Type
conf
DOI
10.1109/IPC.2007.98
Filename
4438429
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