• DocumentCode
    2865242
  • Title

    Aids to developing testable custom LSI

  • Author

    Caughey, D.

  • Author_Institution
    Bell-Northern Research, Ottawa, Canada
  • Volume
    XXI
  • fYear
    1978
  • fDate
    15-17 Feb. 1978
  • Firstpage
    192
  • Lastpage
    192
  • Abstract
    The development of adequate, economical tests for custom LSI circuits is a vital, but increasingly difficult task. Custom chips of VLSI circuit complexity will soon be the norm, with ever widening applications in new products. This session will accent approaches to testing and testability of custom LSI. The usefulness of computer aids for circuit design verification and test vector generation, and the merits of rigorous design philosophies which guarantee testability, will be assessed.
  • Keywords
    Chip scale packaging; Circuit faults; Circuit simulation; Circuit testing; Design automation; Large scale integration; Logic arrays; Logic circuits; Logic design; Logic testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference. Digest of Technical Papers. 1978 IEEE International
  • Conference_Location
    San Francisco, CA, USA
  • Type

    conf

  • DOI
    10.1109/ISSCC.1978.1155809
  • Filename
    1155809