Author :
Yoshimura, Hiroyuki ; Hirai, Makoto ; Asaoka, Tadashi ; Toyoda, Hajime
Author_Institution :
NTT Musashino Electrical Communication Laboratory, Tokyo, Japan
Abstract :
The development of a 64Kbit MOS RAM, using a single transistor cell and single-level polysilicon gate process, with 200ns access time, 150mW power dissipation and 128 refresh cycles, will be reported in this paper.
Keywords :
Fabrication; Lithography; Oxidation; Power dissipation; Power measurement; Read-write memory; Solid state circuits; Threshold voltage; Time measurement; Very large scale integration;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1978 IEEE International
Conference_Location :
San Francisco, CA, USA
DOI :
10.1109/ISSCC.1978.1155828
