A high linearity analog front end for multiprocessor SOC integration

Author

Luo, Yong ; Moskalev, Anatoly ; Bays, Laurence E. ; Petryna, Brian J.

Author_Institution

Agere Syst., Allentown, PA, USA

fYear

2004

fDate

16-18 Nov. 2004

Firstpage

9

Lastpage

12

Abstract

This paper reports a high linearity low power analog front end (AFE) subsystem composed of a contact image sensor (CIS) input amplifier, a programmable gain amplifier (PGA), a 10-bit pipelined analog-to-digital converter (ADC) and a 10-bit offset calibration digital-to-analog converter (DAC). The AFE was integrated into a mixed-signal multiprocessor system-on-chip (SOC) by using conventional ASIC flow. This SOC is fabricated in 0.14 μm CMOS process with 3.3 V/1.5 V power supplies. The AFE runs up to 20 Ms/s sampling rate, ATE measurement shows on-chip performance of ±0.8LSB DNL and ±0.9LSB INL with less than 38 mW power dissipation. Timing, functional and behavior models are developed to support ASIC design flow and tools.

Keywords

CMOS integrated circuits; amplifiers; analogue-digital conversion; circuit CAD; image sensors; integrated circuit design; integrated circuit measurement; integrated circuit modelling; low-power electronics; mixed analogue-digital integrated circuits; multiprocessing systems; programmable circuits; system-on-chip; timing; 0.14 micron; 1.5 V; 10 bit; 3.3 V; 38 mW; ASIC design flows; ASIC design tools; ASIC flow; ATE measurement; CIS; CMOS process; DAC; PGA; SOC; behavior models; contact image sensor input amplifier; functional models; high linearity analog front end; integrated AFE; low power AFE subsystem; mixed-signal multiprocessor system-on-chip; multiprocessor SOC integration; offset calibration digital-to-analog converter; on-chip performance; pipelined analog-to-digital converter; power dissipation; power supplies; programmable gain amplifier; sampling rate; timing models; Analog-digital conversion; Application specific integrated circuits; Calibration; Computational Intelligence Society; Digital-analog conversion; Electronics packaging; High power amplifiers; Image sensors; Linearity; Multiprocessing systems;

fLanguage

English

Publisher

ieee

Conference_Titel

System-on-Chip, 2004. Proceedings. 2004 International Symposium on

Print_ISBN

0-7803-8558-6

Type

conf

DOI

10.1109/ISSOC.2004.1411130

Filename

1411130