DocumentCode :
2866737
Title :
A fully integrated low-IF DVB-T receiver architecture
Author :
Andrijevic, Gnran ; Magnusson, Håkan ; Olsson, Helena
Author_Institution :
Dept. of Microelectron. & Inf. Technol., R. Inst. of Technol., Kista, Sweden
fYear :
2004
fDate :
16-18 Nov. 2004
Firstpage :
189
Lastpage :
192
Abstract :
We propose a fully integrated DVB-T receiver architecture for low cost CMOS implementation. The receiver uses a dual-IF architecture to cover the receive bands from 170 MHz to 862 MHz and a low-IF of 4.57 MHz. Key performance values meet the DVB-T requirements with competitive performance (sensitivity 72.5 dBm, noise figure 6.6 dB, adjacent channel protection ratio (ACPR)= -43 dB, available SNR=28 dB) and suggest that low cost receivers are realistic in volume for the coming digital broadcasting systems.
Keywords :
CMOS integrated circuits; digital video broadcasting; radio receivers; television receivers; 170 to 862 MHz; 4.57 MHz; 6.6 dB; CMOS implementation; digital broadcasting systems; dual-IF architecture; fully integrated DVB-T receiver; low cost receivers; low-IF DVB-T receiver; Circuit optimization; Costs; Digital TV; Digital video broadcasting; Linearity; Noise figure; Noise measurement; Protection; Receivers; TV broadcasting;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
System-on-Chip, 2004. Proceedings. 2004 International Symposium on
Print_ISBN :
0-7803-8558-6
Type :
conf
DOI :
10.1109/ISSOC.2004.1411182
Filename :
1411182
Link To Document :
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