DocumentCode :
2866746
Title :
Towards a Quaternion Complex Logarithmic Number System
Author :
Arnold, Mark G. ; Cowles, John ; Paliouras, Vassilis ; Kouretas, Ioannis
Author_Institution :
Lehigh Univ., Bethlehem, PA, USA
fYear :
2011
fDate :
25-27 July 2011
Firstpage :
33
Lastpage :
42
Abstract :
The well-known generalization of real to complex arithmetic (two reals) extends further to more obscure quaternion arithmetic (four reals), which has applications in signal processing, aerospace, graphics and virtual reality. Quaternion multiplication implements 3D rotation, but is expensive (usually 16 floating-point multiplications and 12 additions). This paper proposes an alternative quaternion representation using logarithms to reduce multiplication cost. The real Logarithmic Number System (LNS) allows fast and inexpensive multiplication and division in embedded and FPGA-based systems. Recent advances in the Complex LNS (CLNS) have made fast log-polar complex representation affordable. Although the quaternion logarithm function is also well-defined, it is not useful to simplify multiplication (in the same way real and complex logarithms are) because quaternion multiplication is not commutative but quaternion addition is. To overcome this, we propose a novel Quaternion Complex (QCLNS) representation using a pair of CLNS numbers. This representation implements quaternion multiplication using only the theoretical minimum, of 8 LNS multipliers (i.e., fixed-point adders) and two CLNS adders. Because CLNS numbers are more compact than ordinary rectangular complex representation, single-precision QCLNS occupies 10.9 percent less memory than conventional quaternion representation. Extrapolating conventional LNS and floating-point synthesis data from Fu et al., QCLNS saves on average 10 percent of FPGA resources for precisions between 13 and 45 bits.
Keywords :
extrapolation; field programmable gate arrays; floating point arithmetic; multiplying circuits; 3D rotation; CLNS numbers; FPGA based system; QCLNS; complex arithmetic; floating point synthesis data; log-polar complex representation; quaternion addition; quaternion complex logarithmic number system; quaternion multiplication; signal processing; virtual reality; Adders; Field programmable gate arrays; Hardware; Quantum cascade lasers; Quaternions; Three dimensional displays; Virtual reality; Complex number; FPGA; Logarithmic Number System; hardware function evaluation; quaternion; rotation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Arithmetic (ARITH), 2011 20th IEEE Symposium on
Conference_Location :
Tubingen
ISSN :
1063-6889
Print_ISBN :
978-1-4244-9457-6
Type :
conf
DOI :
10.1109/ARITH.2011.14
Filename :
5992106
Link To Document :
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