DocumentCode
2867306
Title
A subnanosecond masterslice array offering logic plus memory
Author
Braeckelmann, W. ; Delker, K. ; Gonauser, E. ; Kaiser, Hartmut ; Trinkl, W. ; Wilhelm, W.
Volume
XXII
fYear
1979
fDate
14-16 Feb. 1979
Firstpage
64
Lastpage
65
Abstract
A 35mm2bipolar masterslice array offering up to 712 gate functions of subnanosecond random logic and 128 bits of RAM will be reported, citing its application to a 50MHz 4b microprocessor slice.
Keywords
Boron; Circuits; Delay; Logic arrays; Logic functions; Power dissipation; Programmable logic arrays; Random access memory; Read-write memory; Wiring;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1979 IEEE International
Conference_Location
Philadelphia, PA, USA
Type
conf
DOI
10.1109/ISSCC.1979.1155934
Filename
1155934
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