DocumentCode :
2867471
Title :
A Delay-Line-Based GFSK Demodulator for Low-IF Receivers
Author :
Hong-Sing Kao ; Yang, Ming-Jen ; Lee, Tai-Cheng
Author_Institution :
AlfaPlus Semicond., Hsinchu
fYear :
2007
fDate :
11-15 Feb. 2007
Firstpage :
88
Lastpage :
589
Abstract :
A low-power GFSK demodulator employing a self-calibrated delay line and DSP circuits achieves an SNR of 14.9dB. Without any accurate analog circuits and oversampling clocks, the demodulator performs detection for frequency offsets up to plusmn350kHz. Fabricated in a 0.18mum CMOS process, it occupies 0.26mm2 and consumes 2mA from a 1.8V supply.
Keywords :
delay lines; demodulators; frequency shift keying; receivers; 0.18 micron; 1.8 V; 2 mA; DSP circuits; delay-line-based GFSK demodulator; low-IF receivers; self-calibrated delay line; Bit error rate; Circuits; Clocks; Delay lines; Demodulation; Frequency shift keying; Hardware; Radio frequency; Signal to noise ratio; Wireless sensor networks;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2007. ISSCC 2007. Digest of Technical Papers. IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0193-6530
Print_ISBN :
1-4244-0853-9
Electronic_ISBN :
0193-6530
Type :
conf
DOI :
10.1109/ISSCC.2007.373601
Filename :
4242278
Link To Document :
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