DocumentCode
2867708
Title
Leveraging tapped-inductor architectures to increase power density of single and dual-polarity-output buck-boost converters
Author
Barberena, Hector F Arroyo
Author_Institution
Nat. Semicond. Corp, San Diego, CA, USA
fYear
2011
fDate
6-11 March 2011
Firstpage
1447
Lastpage
1450
Abstract
Compact, efficient, non-isolated DC-DC converters where the output voltage falls within the input voltage range are needed in numerous commercial applications, including industrial, automotive and low voltage battery systems. Traditional approaches such as SEPIC, four-switches buck boost or transformer-based topologies can solve the application requirement, however they also bring some compromises depending on the topology selected, whether that is increased size, complexity or losses. This paper analyses a tap-to-ground tapped-inductor buck boost architecture that introduces a different approach to solve this application requirement. It´s compact, uncomplicated and flexible enough to be used in single output applications as well as to generate dual complementary rails, very common requirement when powering analog electronics.
Keywords
DC-DC power convertors; network topology; DC-DC converters; dual-polarity-output buck boost converters; power density; tapped-inductor architectures; Complexity theory; Converters; Inductors; Magnetic cores; Topology; Voltage control; Windings;
fLanguage
English
Publisher
ieee
Conference_Titel
Applied Power Electronics Conference and Exposition (APEC), 2011 Twenty-Sixth Annual IEEE
Conference_Location
Fort Worth, TX
ISSN
1048-2334
Print_ISBN
978-1-4244-8084-5
Type
conf
DOI
10.1109/APEC.2011.5744782
Filename
5744782
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