DocumentCode
2868300
Title
How to half wire lengths in the layout of cyclic shifters
Author
Hillebrand, Mark A. ; Schürger, Thomas ; Seidel, Peter-Michael
Author_Institution
Dept. of Comput. Sci., Saarlandes Univ., Saarbrucken, Germany
fYear
2001
fDate
2001
Firstpage
339
Lastpage
344
Abstract
Cyclic shifters are required in many central parts of microprocessors and floating-point units. The main difficulty in conventional cyclic shifter designs are the long internal wire connections. For this reason we propose cyclic shifter layouts that improve the accumulated wire length on the critical path by rearranging the placement of the logical gates. We can show that in this way the wire length complexity on the critical path can be reduced from Ω(n log(n)) in conventional designs to O(n) in our optimized designs where n is the width of the shifted operand. For the practical case of n=64 we shorten the accumulated wire length on the critical path by a factor of 2.20. In the same design the maximal size of a net that has to be driven by a single gate is cut down by a factor of 1.86. This leads to faster cyclic shifter designs with less power consumption
Keywords
circuit layout CAD; floating point arithmetic; integrated circuit layout; logic CAD; microprocessor chips; wiring; accumulated wire length; critical path; cyclic shifters; floating-point units; internal wire connections; maximal size; microprocessors; placement; power consumption; shifted operand; wire length complexity; Circuit synthesis; Computer science; Design optimization; Electronic mail; Energy consumption; Microprocessors; Routing; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 2001. Fourteenth International Conference on
Conference_Location
Bangalore
ISSN
1063-9667
Print_ISBN
0-7695-0831-6
Type
conf
DOI
10.1109/ICVD.2001.902682
Filename
902682
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