Self-synchronization of an Array of Programmable Oscillators (Clocks)

Author

Ziel, Stephen A. ; Salem, Fathi M.

Author_Institution

Dept. of Electr. & Comput. Eng., Michigan State Univ., East Lansing, MI

fYear

2006

fDate

25-28 June 2006

Firstpage

1537

Lastpage

1542

Abstract

We present the CMOS circuit design and realization of an architecture for synchronizing multiple programmable oscillators (nodes). This circuit performs phase locking and locks to a common frequency with constant phase differences. The nodes are digitally-controlled-oscillators (DCOs) coupled via vector multipliers implemented by composing (analog) CMOS Gilbert multipliers. The overall 3-node example circuit presented here includes on-chip inductors, and occupies total of 712.65mu by 568.2mu area in the 0.5mum technology process. This design is scalable to large numbers of nodes as well as finer feature size technologies

Keywords

CMOS integrated circuits; circuit CAD; oscillators; CMOS Gilbert multipliers; CMOS circuit design; digitally-controlled-oscillators; multiple programmable oscillators; on-chip inductors; programmable oscillators array; vector multipliers; CMOS technology; Clocks; Coupling circuits; Frequency synchronization; Low pass filters; Neurons; Oscillators; Probes; USA Councils; Varactors;

fLanguage

English

Publisher

ieee

Conference_Titel

Mechatronics and Automation, Proceedings of the 2006 IEEE International Conference on

Conference_Location

Luoyang, Henan

Print_ISBN

1-4244-0465-7

Electronic_ISBN

1-4244-0466-5

Type

conf

DOI

10.1109/ICMA.2006.257403

Filename

4026318