DocumentCode :
2868543
Title :
A self-refreshing 4K RAM with sub-mW standby power
Author :
Caywood, J. ; Pathak, Jyotishman ; VanBuren, G. ; Owen, S.
Author_Institution :
Intel Corp., Santa Clara, CA, USA
Volume :
XXII
fYear :
1979
fDate :
14-16 Feb. 1979
Firstpage :
16
Lastpage :
17
Abstract :
A 4K clocked static NMOS RAM using a memory cell with asynchronous on-chip refresh in combination with a CE buffer design to obtain 200ns access time, while drawing less than 10μA standby current and less than 6mA active current, will be discussed.
Keywords :
Batteries; CMOS technology; Capacitors; Clocks; Electrons; MOS devices; Parasitic capacitance; Random access memory; Read-write memory; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1979 IEEE International
Conference_Location :
Philadelphia, PA, USA
Type :
conf
DOI :
10.1109/ISSCC.1979.1156006
Filename :
1156006
Link To Document :
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