Title :
A 4Mb full wafer ROM
Author :
Kitano, Yoshitaka ; Kohda, Shigeto ; Kikuchi, Hideo ; Sakai, Shigenobu
Author_Institution :
NTT Musashino Electrical Communication Laboratory, Tokyo, Japan
Abstract :
A full wafer mask programmable ROM incorporating 4Mb modules and module-selecting circuits on a 3" wafer, developed for a Chinese ideograph character generator, will be described. Memory cell has multigate MOS structure similar to CCD. Defect tolerant technology with duplicated block configuration has been used for yield enhancement.
Keywords :
Circuits; Read only memory; Timing;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1980 IEEE International
Conference_Location :
San Francisco, CA, USA
DOI :
10.1109/ISSCC.1980.1156018