DocumentCode
2868920
Title
A 35ns 16K PROM
Author
Wallace, Richard ; Learn, A. ; Schuette, K.
Author_Institution
Intel Corp., Santa Clara, CA, USA
Volume
XXIII
fYear
1980
fDate
13-15 Feb. 1980
Firstpage
148
Lastpage
149
Abstract
This paper will cover a 16,384b PROM organized 2K × 8, fabricated on a 140mil square chip, with a typical 25ns access time and 600mW power dissipation.
Keywords
Added delay; Decoding; PROM; Schottky diodes; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1980 IEEE International
Conference_Location
San Francisco, CA, USA
Type
conf
DOI
10.1109/ISSCC.1980.1156026
Filename
1156026
Link To Document