DocumentCode :
2869076
Title :
A 7mW-to-183mW Dynamic Quality-Scalable H.264 Video Encoder Chip
Author :
Chang, Hsiu-Cheng ; Chen, Jia-Wei ; Su, Ching-Lung ; Yang, Yao-Chang ; Li, Yao ; Chang, Chun-Hao ; Chen, Ze-Min ; Yang, Wei-Sen ; Lin, Chien-Chang ; Chen, Ching-Wen ; Wang, Jinn-Shan ; Guo, Jiun-In
Author_Institution :
National Chung-Cheng Univ., Chia-Yi
fYear :
2007
fDate :
11-15 Feb. 2007
Firstpage :
280
Lastpage :
603
Abstract :
A dynamic quality-scalable H.264 video encoder is presented for power-adaptive video encoding. In 0.13mum CMOS technology, it requires 470kgates/13.3kB SRAM and consumes 7mW/183mW in encoding 30fps CIF/HD720 video. Compared to the state-of-the-art design for real-time HD720 video encoding, a 49% reduction in gate count and a 61% reduction in internal memory is achieved
Keywords :
CMOS integrated circuits; SRAM chips; video codecs; video coding; 0.13 micron; 13.3 kByte; 7 to 183 mW; CIF-HD720 video; CMOS technology; H.264 video encoder chip; SRAM chips; video encoding; Application software; Clocks; Costs; Encoding; Energy consumption; High definition video; MPEG 4 Standard; PSNR; Scalability; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2007. ISSCC 2007. Digest of Technical Papers. IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0193-6530
Print_ISBN :
1-4244-0853-9
Electronic_ISBN :
0193-6530
Type :
conf
DOI :
10.1109/ISSCC.2007.373403
Filename :
4242374
Link To Document :
بازگشت