DocumentCode
2869121
Title
On-Die Supply-Resonance Suppression Using Band-Limited Active Damping
Author
Xu, Jianping ; Hazucha, Peter ; Huang, Mingwei ; Aseron, Paolo ; Paillet, Fabrice ; Schrom, Gerhard ; Tschanz, James ; Zhao, Cangsang ; De, Vivek ; Karnik, Tanay ; Taylor, Greg
Author_Institution
Intel, Hillsboro, OR
fYear
2007
fDate
11-15 Feb. 2007
Firstpage
286
Lastpage
603
Abstract
The impedance of a microprocessor power-delivery network peaks at ~140MHz, resulting in power-grid resonance, which lowers operating frequency and compromises reliability. A suppression circuit uses an active-damping technique with a maximum of 12.7dB peak-to-peak noise reduction from 70 to 250MHz in a 90nm CMOS process.
Keywords
CMOS integrated circuits; damping; microprocessor chips; power supply circuits; 70 to 250 MHz; 90 nm; CMOS process; active damping; microprocessor power-delivery network; noise reduction; on-die supply-resonance suppression circuit; power-grid resonance; Band pass filters; Damping; Frequency; Inverters; MIM capacitors; MOS capacitors; Microprocessors; Packaging; Resonance; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2007. ISSCC 2007. Digest of Technical Papers. IEEE International
Conference_Location
San Francisco, CA
ISSN
0193-6530
Print_ISBN
1-4244-0853-9
Electronic_ISBN
0193-6530
Type
conf
DOI
10.1109/ISSCC.2007.373406
Filename
4242377
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