• DocumentCode
    2869143
  • Title

    DESIGN FOR TESTABILITY USING SCANPATH TECHNIQUES FOR PATH-DELAY TEST AND MEASUREMENT

  • Author

    Dervisoglu, Bulent I. ; Stong, Gayvin E.

  • fYear
    1991
  • fDate
    26-30 Oct 1991
  • Firstpage
    365
  • Keywords
    Circuit faults; Circuit testing; Clocks; Design for testability; Digital integrated circuits; Electrical fault detection; Flip-flops; Frequency; Integrated circuit measurements; Integrated circuit testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 1991, Proceedings., International
  • ISSN
    1089-3539
  • Print_ISBN
    0-8186-9156-5
  • Type

    conf

  • DOI
    10.1109/TEST.1991.519696
  • Filename
    519696
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2869143