DocumentCode
2869250
Title
Global Priority Table for Last-Level Caches
Author
Yu, Baozhong ; Ma, Jianliang ; Chen, Tianzhou ; Wu, Minghui
Author_Institution
Coll. of Comput. Sci., Zhejiang Univ., Hangzhou, China
fYear
2011
fDate
12-14 Dec. 2011
Firstpage
279
Lastpage
285
Abstract
Last-level caches (LLC) grow large with significant power consumption. As LLC´s capacity increases, it becomes quite inefficient. As recent studies show, a large percent of cache blocks are dead during the cache time. There is a growing need for LLC management to reduce the number of dead block in the LLC. However, there is a significant power requirement for the dead block´s in-placement and replacement operations. In this paper, we introduce a global priority table predictor, a technique which is used for determining a cache block´s priority when it attempts to insert into the LLC. It is similar to previous predictors, such as reuse distance and dead block predictor. The global priority table is indexed by the hash value of the block address and stores the priority value of the associate cache block. The priority value can be used to drive a dead block replacement and bypass optimization. Through the priority table, a large number of dead blocks could be bypassed. It achieves an average reduction of 13.2% in the number of LLC miss for twenty single-thread workloads from the SPEC2006 suite and 29.9% for ten multi-programmed workloads. It also yields a geometric mean speedup of 8.6% for single-thread workloads and a geometric mean normalized weighted speedup of 39.1% for multi-programmed workloads.
Keywords
cache storage; multiprogramming; power aware computing; storage management; LLC management; associate cache block; bypass optimization; cache block priority determination; dead block predictor; global priority table predictor; last-level caches; multiprogrammed workloads; power consumption; single-thread workloads; Benchmark testing; Electronics packaging; Hidden Markov models; Organizations; Power demand; Prediction algorithms; Radiation detectors; LLC; bypass; cache; dead block; multi-core; re-reference;
fLanguage
English
Publisher
ieee
Conference_Titel
Dependable, Autonomic and Secure Computing (DASC), 2011 IEEE Ninth International Conference on
Conference_Location
Sydney, NSW
Print_ISBN
978-1-4673-0006-3
Type
conf
DOI
10.1109/DASC.2011.65
Filename
6119097
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