DocumentCode
2869263
Title
Analysis and Comparison of Two Different Implementations of MCS-51 Compatible Microcontrollers
Author
Fei, Jincheng ; Quan, Haiyang ; Yuan, Dawei
Author_Institution
Design Dept., Beijing Microelectron. Technol. Inst., Beijing, China
fYear
2011
fDate
12-14 Dec. 2011
Firstpage
275
Lastpage
278
Abstract
This paper properties of a single cycle implementation of MCS-51 compatible microcontroller and a four cycle implementation one in the way of instruction timing, circuit implementation and synthesis result. And the part of circuit implementation focuses on system architecture, instruction execution details acquired from RTL level and the ports. In addition to the contrast, the paper discusses the similarities and differences between the two circuits in IP reuse briefly.
Keywords
logic circuits; microcontrollers; network synthesis; IP reuse; MCS-51 compatible microcontroller; RTL level; circuit implementation; circuit synthesis; instruction execution; instruction timing; intellectual property cores; system architecture; Clocks; Computer architecture; IP networks; Microcontrollers; Random access memory; Registers; Timing; IP reuse; MCS-51; four cycle implementation; single cycle implementation;
fLanguage
English
Publisher
ieee
Conference_Titel
Dependable, Autonomic and Secure Computing (DASC), 2011 IEEE Ninth International Conference on
Conference_Location
Sydney, NSW
Print_ISBN
978-1-4673-0006-3
Type
conf
DOI
10.1109/DASC.2011.207
Filename
6119098
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