Title :
A 5V-only 64K dynamic RAM
Author :
White, L. ; Ngai Hong ; Redwine, D. ; Rao, Ganeswara
Author_Institution :
Texas Instruments, Inc., Houston, TX, USA
Abstract :
A 64K×1 dynamic RAM with a single 5V power supply, access/cycle time of 120/250ns and a die size of 34,000 square mils, using 3μm design rules, will be covered. Interlocked clock circuits, dynamic sense amplifier with active loads, double input address decoding circuitry and grounded substrate operation minimize shortchannel effects and maximize margins.
Keywords :
Clocks; DRAM chips; Decoding; Delay; Feedback circuits; Negative feedback;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1980 IEEE International
Conference_Location :
San Francisco, CA, USA
DOI :
10.1109/ISSCC.1980.1156075
