Title :
Fully static 16Kb bulk CMOS RAM
Author :
Iizuka, Tetsuya ; Ochii, K. ; Ohtani, T. ; Kondo, Toshiaki ; Koyhama, S.
Author_Institution :
Toshiba Corp., Kawasaki, Japan
Abstract :
A coplanar Si-gate CMOS process used in the design of a fully static 16Kb bulk CMOS RAM with a six-transistor cell will be covered. RAM offers a typical 95ns access time with 200mW power dissipation and 1μW standby power.
Keywords :
CMOS memory circuits; CMOS process; CMOS technology; Clocks; Decoding; MOSFETs; Pulse amplifiers; Random access memory; Read-write memory; Voltage;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1980 IEEE International
Conference_Location :
San Francisco, CA, USA
DOI :
10.1109/ISSCC.1980.1156077
