• DocumentCode
    2869760
  • Title

    Fully static 16Kb bulk CMOS RAM

  • Author

    Iizuka, Tetsuya ; Ochii, K. ; Ohtani, T. ; Kondo, Toshiaki ; Koyhama, S.

  • Author_Institution
    Toshiba Corp., Kawasaki, Japan
  • Volume
    XXIII
  • fYear
    1980
  • fDate
    13-15 Feb. 1980
  • Firstpage
    226
  • Lastpage
    227
  • Abstract
    A coplanar Si-gate CMOS process used in the design of a fully static 16Kb bulk CMOS RAM with a six-transistor cell will be covered. RAM offers a typical 95ns access time with 200mW power dissipation and 1μW standby power.
  • Keywords
    CMOS memory circuits; CMOS process; CMOS technology; Clocks; Decoding; MOSFETs; Pulse amplifiers; Random access memory; Read-write memory; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference. Digest of Technical Papers. 1980 IEEE International
  • Conference_Location
    San Francisco, CA, USA
  • Type

    conf

  • DOI
    10.1109/ISSCC.1980.1156077
  • Filename
    1156077
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2869760