DocumentCode :
2870279
Title :
2K × 8b HCMOS static RAMs
Author :
Masuhara, T. ; Minato, O. ; Sasaki, T. ; Nakamura, Hajime ; Sakai, Yoshiki ; Yasui, T. ; Uchibori, K.
Author_Institution :
Hitachi Central Research Laboratory, Tokyo, Japan
Volume :
XXIII
fYear :
1980
fDate :
13-15 Feb. 1980
Firstpage :
224
Lastpage :
225
Abstract :
A pair of HCMOS static RAMs with 2K word×8b organization, using JFET-powered static RAM cells and operating at 74ns typical access time, operating power of 200mW and standby power of 25μW will be described.
Keywords :
Alpha particles; Batteries; CMOS technology; Decoding; Delay; Driver circuits; Power generation; Read-write memory; Solid state circuits; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1980 IEEE International
Conference_Location :
San Francisco, CA, USA
Type :
conf
DOI :
10.1109/ISSCC.1980.1156107
Filename :
1156107
Link To Document :
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