DocumentCode
2870337
Title
Time interleaved converter arrays
Author
Black, W. ; Hodges, D.A.
Author_Institution
University of California, Berkeley, CA, USA
Volume
XXIII
fYear
1980
fDate
13-15 Feb. 1980
Firstpage
14
Lastpage
15
Abstract
An A/D converter technique which uses an array of four 7b converters, with interleaved sampling intervals affording rates exceeding 2MHz, will be covered. A 10μ metal gate CMOS chip is used.
Keywords
Bandwidth; CMOS process; Equations; Jitter; Linearity; Phased arrays; Sampling methods; Signal analysis; Signal sampling; Solid state circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1980 IEEE International
Conference_Location
San Francisco, CA, USA
Type
conf
DOI
10.1109/ISSCC.1980.1156111
Filename
1156111
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