DocumentCode
2870439
Title
A digital signal processor for telecommunications applications
Author
Boddie, J. ; Daryanani, G. ; Eldumiati, I. ; Gadenz, R. ; Thompson, John ; Walters, Seth ; Pedersen, Rasmus
Author_Institution
Bell Laboratories, Holmdel, NJ, USA
Volume
XXIII
fYear
1980
fDate
13-15 Feb. 1980
Firstpage
44
Lastpage
45
Abstract
This paper will report on a programmable digital signal processor chip which can decode on instruction, fetch data, perform a 16 × 20b multiply, and add the resultant to a 40b accumulator in 80ns. Circuit permits all signal processing functions of a dual-tone multifrequency receiver or a low-speed modem to be realized on one chip.
Keywords
Arithmetic; Decoding; Digital signal processors; Flexible printed circuits; Gold; Random access memory; Read only memory; Read-write memory; Registers; Signal processing;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1980 IEEE International
Conference_Location
San Francisco, CA, USA
Type
conf
DOI
10.1109/ISSCC.1980.1156117
Filename
1156117
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