Title :
An 11b 800MS/s Time-Interleaved ADC with Digital Background Calibration
Author :
Hsu, Chleng-Chung ; Huang, Fong-Ching ; Shih, Chih-Yung ; Huang, Chen-Chih ; Lin, Ying-Hsi ; Lee, Chao-Cheng ; Razavi, Behzad
Author_Institution :
Realtek, Hsinchu
Abstract :
An 11 b 800MS/S time-interleaved ADC is implemented in a 90nm CMOS process for a 10GBase-T application. A single open-loop T/H circuit using a cascode source follower achieves high resolution and conversion rate. The offset and gain mismatches are corrected by the digital background calibration. The measured DNL and INL are <0.5LSB and <1.6LSB, respectively. The measured SNDRs are 58 and 54dB for 15 and 400MHz inputs, respectively. The 1.4mm2 ADC consumes 350mW from a 1.3V supply (1.5V for T/H).
Keywords :
CMOS integrated circuits; analogue-digital conversion; 1.3 V; 1.5 V; 10GBase-T application; 11 bit; 15 MHz; 350 mW; 400 MHz; 90 nm; CMOS process; cascode source follower; digital background calibration; open-loop T/H circuit; time-interleaved analog-to-digital converter; Bandwidth; Calibration; Circuits; Clocks; Error correction; Least squares approximation; Linearity; Performance gain; Sampling methods; Voltage;
Conference_Titel :
Solid-State Circuits Conference, 2007. ISSCC 2007. Digest of Technical Papers. IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
1-4244-0852-0
Electronic_ISBN :
0193-6530
DOI :
10.1109/ISSCC.2007.373495
