DocumentCode
2870799
Title
Processing tolerance and trim considerations in monolithic FET amplifiers
Author
Degenford, J. ; Cohn, M. ; Freitag, Ron ; Boire, D.
Author_Institution
Westinghouse Electric Corp., Baltimore, MD, USA
Volume
XXIII
fYear
1980
fDate
13-15 Feb. 1980
Firstpage
120
Lastpage
121
Abstract
This paper will report on the application of direct ion implantation into unbuffered GaAs substrates for FETs and monolithic power amplifiers. The effects of processing tolerances and compensating trim adjustments on the performance of a 2-stage 1W octave bandwidth amplifier will be analyzed.
Keywords
Capacitance; Costs; Doping; FETs; Frequency; Gallium arsenide; Geometry; Heat sinks; Microstrip; Transmission line measurements;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference. Digest of Technical Papers. 1980 IEEE International
Conference_Location
San Francisco, CA, USA
Type
conf
DOI
10.1109/ISSCC.1980.1156136
Filename
1156136
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