A 3GHz Switching DC-DC Converter Using Clock-Tree Charge-Recycling in 90nm CMOS with Integrated Output Filter

Author

Alimadadi, Mehdi ; Sheikhaei, Samad ; Lemieux, Guy ; Mirabbasi, Shahriar ; Palmer, Patrick

Author_Institution

British Columbia Univ., Vancouver, BC

fYear

2007

fDate

11-15 Feb. 2007

Firstpage

532

Lastpage

620

Abstract

A 90nm buck converter is intended for complex multi-core ICs. Using the 3GHz system clock for switching reduces the area to 0.27mm² and allows the output filter to be integrated. Efficiency is increased by recycling clock charge and delivering it to the load instead of ground. A dedicated 3GHz clock circuit driving 12pF consumes 39.9mW. In contrast, a combined clock and converter circuit consumes 56.2mW and delivers 25.7mW at the converter output. Regulation is achieved through PWM of the clock. The circuit converts 1.0V to between 0.5 to 0.7V at 40 to 100mA.

Keywords

CMOS integrated circuits; DC-DC power convertors; clocks; filters; pulse width modulation; switching convertors; trees (electrical); 0.5 to 0.7 V; 1.0 V; 12 pF; 25.7 mW; 3 GHz; 39.9 mW; 40 to 100 mA; 56.2 mW; 90 nm; CMOS; PWM; buck converter; clock circuit; clock-tree charge-recycling; integrated output filter; multicore integrated circuits; recycling clock charge; switching DC-DC converter; Circuits; Clocks; DC-DC power converters; Delay; Inductors; Pulse width modulation; Pulse width modulation inverters; Switching converters; Switching loss; Zero voltage switching;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2007. ISSCC 2007. Digest of Technical Papers. IEEE International

Conference_Location

San Francisco, CA

ISSN

0193-6530

Print_ISBN

1-4244-0853-9

Electronic_ISBN

0193-6530

Type

conf

DOI

10.1109/ISSCC.2007.373529

Filename

4242500