DocumentCode :
2871235
Title :
A 16K CMOS EPROM
Author :
Cheng, Peng ; Yiu-Fai Chan ; Levchenko, V.
Author_Institution :
Intersil, Inc., Cupertino, CA, USA
Volume :
XXIV
fYear :
1981
fDate :
18-20 Feb. 1981
Firstpage :
160
Lastpage :
161
Abstract :
THE CONTINUED NEED for low-power, high density- and high programming circuit which clamps the programming voltage Vd performance CMOS EPROMs has been established by the evolution of faster and denser low-power microprocessors, and their dependence on convenient program storage memories. This need was first served by the 4K CMOS EPROM??2, implemented by a two transistor P-channel floating-gate cell. A second-generation 2Kx8 CMOS EPROM has been developed featuring a dual polysilicon N-channel EPROM cell3 which is a one-transistor cell fabricated in the P-well of a CMOS process; Figure 1. Microwatt standby power has been achieved by utilizing synchronous design on an oxide isolated ion-implanted silicon-gate CMOS technology.
Keywords :
Clocks; Decoding; EPROM; Equivalent circuits; Latches; Signal generators; Solid state circuits; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1981 IEEE International
Conference_Location :
New York, NY, USA
Type :
conf
DOI :
10.1109/ISSCC.1981.1156165
Filename :
1156165
Link To Document :
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