Title :
A 4K × 8 dynamic RAM with self refresh
Author :
Reese, E. ; Spaderna, D. ; Flannagan, S. ; Tsang, F.
Author_Institution :
Intel Corporation, Aloha, OR, USA
Abstract :
A 5V-only 4K×8 dynamic RAM with multiplexed address/ data I/O and on-chip self-refresh will be described, The chip has been designed for use in 8b or 16b microprocessor systems.
Keywords :
Circuits; Clocks; Current supplies; DRAM chips; Delay lines; Electronics packaging; Latches; Read-write memory; Timing; Voltage;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1981 IEEE International
Conference_Location :
New York, NY, USA
DOI :
10.1109/ISSCC.1981.1156175
