DocumentCode :
2871552
Title :
A 25ns 16 × 1 static RAM
Author :
Tsujide, T. ; Yasuoka, N. ; Hara, Tenshi ; Tokushige, K. ; Hirakawa, N. ; Matsue, S. ; Kurakami, O.
Author_Institution :
Nippon Electric Co., Ltd., Kawasaki, Japan
Volume :
XXIV
fYear :
1981
fDate :
18-20 Feb. 1981
Firstpage :
20
Lastpage :
21
Abstract :
A 25ns 16K×1 static RAM using a double polysilicon/ molybdenum process technology will be reported. The molybdenum is used in the polysilicon word lines to reduce the RC delay to under 1ns. The NMOS memory was designed with 1.5μ photolithography.
Keywords :
Clocks; Current supplies; Decoding; Driver circuits; Logic circuits; Power supplies; Read-write memory; Solid state circuits; Temperature dependence; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1981 IEEE International
Conference_Location :
New York, NY, USA
Type :
conf
DOI :
10.1109/ISSCC.1981.1156183
Filename :
1156183
Link To Document :
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