DocumentCode :
2871648
Title :
An NMOS VLSI process for fabrication of a 32b CPU chip
Author :
Mikkelson, J. ; Hall, Leonard ; Malhotra, Ahana ; Seccombe, S. ; Wilson, M.
Author_Institution :
Hewlett-Packard Company, Fort Collins, CO, USA
Volume :
XXIV
fYear :
1981
fDate :
18-20 Feb. 1981
Firstpage :
106
Lastpage :
107
Abstract :
The VLSI processing system chips with over 600,000 transistors per chip will be discussed, citing the use of optical lithography with a 
m pitch and double layer metalization.
m pitch and double layer metalization.Keywords :
Central Processing Unit; Fabrication; Geometry; Implants; Integrated circuit interconnections; MOS devices; Optical interconnections; Optical refraction; Tungsten; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1981 IEEE International
Conference_Location :
New York, NY, USA
Type :
conf
DOI :
10.1109/ISSCC.1981.1156188
Filename :
1156188
Link To Document :
