DocumentCode :
2872395
Title :
A self-aligned source/drain planar device for ultrahigh-speed GaAs MESFET VLSIs
Author :
Yokoyama, Naoki ; Mimura, Takashi ; Fukuta, M. ; Ishikawa, Hiroshi
Author_Institution :
Fujitsu Laboratories, Ltd., Kawasaki, Japan
Volume :
XXIV
fYear :
1981
fDate :
18-20 Feb. 1981
Firstpage :
218
Lastpage :
219
Abstract :
A self-aligned source/drain planar GaAs MESFET fabrication technique using high temperature stable Ti-W mixed metal gates as implantation masks will be reported. Propagation delays of 50ps have been attained from fully implanted 
m-gate normally-off GaAs MESFET logic.
m-gate normally-off GaAs MESFET logic.Keywords :
Electrodes; FETs; Gallium arsenide; Inverters; Ion implantation; Logic circuits; MESFETs; Surface resistance; Temperature; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1981 IEEE International
Conference_Location :
New York, NY, USA
Type :
conf
DOI :
10.1109/ISSCC.1981.1156230
Filename :
1156230
Link To Document :
