DocumentCode :
2872404
Title :
A 3ns 1Kb RAM using super self-aligned process technology
Author :
Sakai, Tetsushi ; Yamamoto, Yousuke ; Kobayashi, Yoshiji ; Kawarada, Kuniyasu ; Inabe, Y.
Author_Institution :
NTT Musashino Electrical Communication Laboratory, Tokyo, Japan
Volume :
XXIV
fYear :
1981
fDate :
18-20 Feb. 1981
Firstpage :
216
Lastpage :
217
Abstract :
A static bipolar 256×4b ECL RAM with typical access time of 2.7ns at 550mW will be described. Device was fabricated with a self-aligned polysilicon base and emitter technology.
Keywords :
Boron; Circuits; Electrodes; Etching; Fabrication; Oxidation; Parasitic capacitance; Power dissipation; Read-write memory; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1981 IEEE International
Conference_Location :
New York, NY, USA
Type :
conf
DOI :
10.1109/ISSCC.1981.1156231
Filename :
1156231
Link To Document :
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