DocumentCode
2872456
Title
Experimental Evaluation of Three Concurrent Error Detection Mechanisms
Author
Vahdatpour, Alireza ; Fazeli, Mahdi ; Miremadi, Seyed Ghassem
Author_Institution
Dependable Syst. Lab. Comput. Eng. Dept., Sharif Univ. of Technol., Tehran
fYear
2006
fDate
16-19 Dec. 2006
Firstpage
67
Lastpage
70
Abstract
This paper presents an experimental evaluation of the effectiveness of three hardware-based control flow checking mechanisms, using software-implemented fault injection (SWIFI) method. The fault detection technique uses reconfigurable of the shelf FPGAs to concurrently check the execution flow of the target program. The technique assigns signatures to the target program in the compile time and verifies the signatures using a FPGA as a watchdog processor to detect possible violation caused by the transient faults. A total of 3000 faults were injected in the experimental embedded system, which is based on an 8051 microcontroller, to measure the error detection coverage. The experimental results show that these mechanisms detect about 90% of transient errors, injected by software implemented method.
Keywords
data flow analysis; error detection; field programmable gate arrays; logic testing; microcontrollers; FPGA; error detection; fault detection; hardware-based control flow checking mechanisms; microcontroller; software-implemented fault injection method; transient faults; Circuit faults; Computer errors; Control systems; Costs; Error correction; Fault detection; Fault tolerant systems; Field programmable gate arrays; Hardware; Pervasive computing; Control Flow Checking; Experimental Evaluation; FPGA; Fault Injection;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronics, 2006. ICM '06. International Conference on
Conference_Location
Dhahran
Print_ISBN
1-4244-0764-8
Electronic_ISBN
1-4244-0765-6
Type
conf
DOI
10.1109/ICM.2006.373268
Filename
4243649
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