DocumentCode :
2872569
Title :
Quantifying the impact of architectural scaling on communication
Author :
Heath, Taliver ; Kaur, Samian ; Martin, Richard P. ; Nguyen, Thu D.
Author_Institution :
Dept. of Comput. Sci., Rutgers Univ., New Brunswick, NJ, USA
fYear :
2001
fDate :
2001
Firstpage :
267
Lastpage :
277
Abstract :
This work quantifies how persistent increases in processor speed compared to I/O speed reduce the performance gap between specialized, high performance messaging layers and general purpose protocols such as TCP/IP and UDP/IP. The comparison is important because specialized layers sacrifice considerable system connectivity and robustness to obtain increased performance. We first quantify the scaling effects on small messages by measuring the LogP performance of two Active Message II layers, one running over a specialized VIA layer and the other over stock UDP as we scale the CPU and I/O components. We then predict future LogP performance by mapping the LogP model´s network parameters, particularly overhead into architectural components. Our projections show that the performance benefit afforded by specialized messaging for small messages will erode to a factor of 2 in the next 5 years. Our models further show that the performance differential between the two approaches will continue to erode without a radical restructuring of the I/O system. For long messages, we quantify the variable per-page instruction budget that a zero-copy messaging approach has for page table manipulations if it is to outperform a single-copy approach. Finally we conclude with an examination of future I/O advances that would result in substantial improvements to messaging performance
Keywords :
parallel architectures; performance evaluation; LogP performance; TCP/IP; UDP/IP; architectural scaling; messaging performance; processor speed; Communication system control; Computer science; Costs; Hardware; Performance loss; Predictive models; Protocols; Robustness; Switches; TCPIP;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
High-Performance Computer Architecture, 2001. HPCA. The Seventh International Symposium on
Conference_Location :
Monterrey
ISSN :
1530-0897
Print_ISBN :
0-7695-1019-1
Type :
conf
DOI :
10.1109/HPCA.2001.903269
Filename :
903269
Link To Document :
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