Design and implementation of a pulse width modulator for a three-level inverter using a microprocessor and EPLDS

In the development of a megawatt drive for asynchronous machines using a three-level GTO-inverter, a new pulse width modulator (PWM) has been designed and implemented. The PWM consists of a pattern generator, a special test pattern generator, and an inverter interface. The pattern generator produces space vector modulated and pulse number modulated phase switching state patterns. User defined test patterns are produced by the test pattern generator to allow easy testing of inverter units. The inverter interface uses GTO state feedback signals to transform the phase state or test patterns into GTO command signals. The PWM is equipped with extensive diagnostic facilities, including a GTO timing analyzer. The implementation of the PWM is based on an 68000 microprocessor and various EPLDs (erasable programmable logic devices) for the protective and speed requiring functions. The use of EPLDs has a software-like flexibility in implementation. Tests on the prototype drive system have shown excellent behaviour