DocumentCode :
2872694
Title :
Multi-Step Stress Test for Yield Improvement of 16Mbit EPROMs with Redundancy Scheme
Author :
Miyamoto, J. ; Ohtsuka, N. ; Imamiya, K. ; Tomita, N. ; Iyama, Y.
fYear :
1991
fDate :
26-30 Oct 1991
Firstpage :
540
Keywords :
Circuit testing; EPROM; Electrons; Fabrication; Nonvolatile memory; Redundancy; Reliability engineering; Semiconductor device testing; Semiconductor devices; Stress;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 1991, Proceedings., International
ISSN :
1089-3539
Print_ISBN :
0-8186-9156-5
Type :
conf
DOI :
10.1109/TEST.1991.519716
Filename :
519716
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2872694
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