DocumentCode :
2872927
Title :
A New Wirelength Model for Analytical Placement
Author :
Ray, B.N.B. ; Balachandran, Shankar
Author_Institution :
Dept. of Comput. Sci. & Eng., Indian Inst. of Technol. Madras, Chennai, India
fYear :
2011
fDate :
4-6 July 2011
Firstpage :
90
Lastpage :
95
Abstract :
Minimization of Half-Perimeter Wire length (HPWL) is a commonly used objective for circuit placement. Analytical placers require approximations of it that are smooth, continuous and differentiable. This paper proposes a new mathematical model to approximate the HPWL cost function. We discuss the theory behind the model and show its convergence properties. We derive the error bounds of the new cost function and show several desirable properties of the new approximation model. We use the global and detailed placements produced by the NTUPlacer on ISPD 2004 benchmark suite to compare the smoothed approximation to two other approximation schemes namely the LogSumExp and CHKS based approximations. Our experiments validate our theoretical results and we show that our scheme has an average of 5% error in the total wire length. We also discuss key implementation issues that can help in keeping the analytical placers based on this approximation numerically stable.
Keywords :
VLSI; approximation theory; circuit optimisation; integrated circuit design; integrated circuit modelling; minimisation; CHKS approximation model; HPWL cost function; LogSumExp approximation model; VLSI chip design; analytical placement; circuit placement; error bounds; halfperimeter wire length minimization; mathematical model; wirelength model; Analytical models; Approximation methods; Equations; Integrated circuit modeling; Mathematical model; Runtime; Upper bound; absolute function; analytical placement; approximation; wirelength;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI (ISVLSI), 2011 IEEE Computer Society Annual Symposium on
Conference_Location :
Chennai
ISSN :
2159-3469
Print_ISBN :
978-1-4577-0803-9
Electronic_ISBN :
2159-3469
Type :
conf
DOI :
10.1109/ISVLSI.2011.78
Filename :
5992465
Link To Document :
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