Title :
Redundancy techniques for fast static RAMs
Author :
Kokkonen, Kimmo ; Sharp, P. ; Albers, Rob ; Dishaw, J. ; Louie, F. ; Smith, Ross
Author_Institution :
Intel Corporation, Santa Clara, CA, USA
Abstract :
Circuitry to implement redundancy for fast static RAMs will be discussed. For a 16K×1 static RAM, with 40ns typical access time, the circuitry adds 6% to die area, 3ns to access time and ∼ 3% to circuit power, while allowing substantial yield improvements.
Keywords :
Circuit faults; Circuit synthesis; Decoding; Fuses; Ground support; Probes; Random access memory; Read-write memory; Redundancy; Technological innovation;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1981 IEEE International
Conference_Location :
New York, NY, USA
DOI :
10.1109/ISSCC.1981.1156267
