Title :
Medium-voltage lateral NMOS power devices in standard CMOS technology
Author :
Behrens, F.H. ; Finco, S. ; Simas, M. I Castro
Author_Institution :
Fundacao Centre Tecnologico para Informatica, CTI, Instituto de Microeletronica, Sao Paulo, Brazil
Abstract :
Medium-voltage lateral structures for power NMOS devices, suitable for integration with standard low-voltage CMOS control circuits in power ICs, are presented. Two device types were fabricated on 2.0 and 1.5 microns, N-well, 2 metal layer, 10-mask CMOS standard technologies. Design rules and device mask geometry were adapted for enlarging the operating voltage range to 160 volts. The LDD-NMOS transistor is based on the lightly doped drain concept. The LDSD-NMOS transistor applies the same concept for both source and drain terminals. ON-resistance as low as 9 to 11 mΩ.cm2 and breakdown voltages from 20 to 160 volts were experimentally obtained. Monolithic integration of multiple switches with low-voltage control is possible, since the structures are electrically compatible
Keywords :
CMOS integrated circuits; insulated gate field effect transistors; power integrated circuits; power transistors; semiconductor device models; semiconductor switches; 1.5 micron; 2 micron; 20 to 60 V; LDD-NMOS transistor; LDSD-NMOS transistor; MV structure; breakdown voltages; device mask geometry; lateral NMOS power devices; lightly doped drain; low-voltage CMOS control circuits; multiple switches; power ICs; standard CMOS technology; two metal n-well technology;
Conference_Titel :
Power Electronics and Applications, 1993., Fifth European Conference on
Conference_Location :
Brighton
