Title :
A 35ns 16K NMOS static RAM
Author :
Anami, K. ; Yoshimoto, Masahiko ; Shinohara, Hirofumi ; Hirata, Yasuhisa ; Harada, Hiroshi ; Nakano, T.
Author_Institution :
Mitsubishi Electric Corporation, Itami, Japan
Abstract :
An NMOS 16K×1b static RAM optimized for low soft error sensitivity will be discussed. Access time is typically 35ns with a 275mW active power dissipation.
Keywords :
Capacitance; Circuits; Decoding; Impedance; MOS devices; Power dissipation; Read-write memory; Temperature; Transient analysis; Voltage;
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1982 IEEE International
Conference_Location :
San Francisco, CA, USA
DOI :
10.1109/ISSCC.1982.1156309
